1. Field of the Invention
This invention relates to a semiconductor device and a manufacturing method thereof, and more particularly to a semiconductor device with an improved wiring layer structure, such as a nonvolatile semiconductor memory device, and a manufacturing method thereof.
2. Description of the Related Art
A NAND nonvolatile semiconductor memory device has select gates (SG) for connecting a memory cell unit composed of a plurality of memory cells connected in series to bit lines or source lines. The control gate of each memory cell is connected to a word line (WL). Each select gate is connected to a select gate line. Like a memory cell, a select gate has a tunnel oxide film, a floating gate polysilicon (FG Poly) film, an ONO film where a silicon oxide film, a silicon nitride film and a silicon oxide film are stacked one on top of another, a control gate polysilicon (CG Poly) film, a tungsten silicide (WSi) film, and a silicon nitride (SiN) film. After the formation of these films in sequence, the resist is patterned by a lithographic process. With the patterned resist as a mask, the SiN film, WSi film, CG Poly film, ONO film, and FG Poly film are processed by dry etching, thereby forming the word lines and select gate lines.
Two of the select gates are arranged for the 16 or 32 word lines constituting a memory cell unit. To improve the cut-off characteristic of the select gate, the widths of the select gate and select gate line in the direction of channel length are set greater than the width of the word line. For this reason, in the lithographic process of forming the select gate lines and word lines, the word lines adjacent to the select gate lines are influenced more by a complex optical proximity effect than those in the regions where the word lines are arranged at regular intervals.
Moreover, when there is a contact for, for example, a bit line between select gate lines, a space is formed between the select gate lines. This makes an optical proximity effect on the word lines more complex. In forming a mask used to expose a resist on which such a complex optical proximity effect is exerted, the dimensions of a wire adjacent to a thick wire are controlled by making an optical proximity effect correction (OPC) in the mask. The OPC is carried out by simulation. Since OPC simulation models are currently under development, a sufficient accuracy cannot be obtained. As a result, the margin for the focal depth decreases and therefore the resist grows so thin that it can collapse. Therefore, it has been difficult to maintain the accuracy of the dimensions of a word line adjacent to a thick select gate line.
As an example of suppressing the optical proximity effect, the technique for making the width of each select word line equal to the width of each word line and providing two select gates on either side of one memory cell unit, a total of four select gates, and select lines has been developed (Jpn. Pat. Appln. KOKAI Publication No. 2003-51557).
In the example, an optical proximity effect taking place between a word line and a select gate line adjacent to the word line in a nonvolatile semiconductor memory device has been explained. In semiconductor devices, wires of different widths are often formed next to one another. For this reason, the configuration disclosed in reference may not be used, depending on the circuit configuration or wiring configuration. Therefore, even when wires of different widths are formed next to one another, a semiconductor device capable of improving the accuracy of the dimensions of each wire and a method of fabricating the semiconductor device have been desired.